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Show HN: A Project Oberon System version running on RISC-V instead of RISC-5

This project meticulously ports Niklaus Wirth's iconic Project Oberon system, renowned for its minimalist design and self-hosting capabilities, from its original custom RISC-5 processor to the modern, open RISC-V architecture. It thoughtfully preserves Wirth's design principles while leveraging contemporary hardware and toolchains. Hacker News aficionados will appreciate this intricate blend of retro computing, low-level systems engineering, and open-source hardware adaptation.

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The Lowdown

The Project Oberon System, a monumental achievement in minimalist computing by Niklaus Wirth and Jürg Gutknecht, has been carefully migrated to run on the open-source RISC-V instruction set architecture. Originally conceived as a complete, self-documenting system including an operating system, compiler, and development tools, Oberon was designed to run on Wirth's custom-designed RISC-5 processor. This new adaptation aims to bring the entire system to modern, widely available hardware while maintaining the integrity and simplicity that define Project Oberon.

  • Project Oberon's Heritage: Developed between 1986 and 1989 at ETH Zurich, Project Oberon is notable for being designed and implemented almost entirely by Wirth and Gutknecht, documented comprehensively in "Project Oberon - The Design of an Operating System and Compiler." The 2013 revision further refined the system, using Wirth's simplified Oberon-07 language and a custom RISC-5 processor, built on an FPGA for a low-cost development board, embodying a "hardware-software contract" of just a memory map and instruction set.
  • Motivation for RISC-V Migration: The migration is driven by the desire to run Project Oberon on contemporary, widely available hardware, such as Espressif ESP32 microcontrollers. While amusingly sharing a "RISC" prefix, RISC-V aligns with RISC-5's design philosophy of simplicity, a compiler-friendly ISA, and a 32-bit load/store architecture. The Oberon system's lack of an MMU requirement makes it particularly suitable for these microcontrollers.
  • Technical Implementation: The migration involved moving the Oberon-07 source code to the more common Oberon 90 standard. The author leveraged their existing OP2 compiler, which already supports a RISC-V (RV32) backend, rather than modifying Wirth's original OR compiler. An emulated RISC-V machine, based on a stripped-down rv32emu, faithfully reproduces Wirth's original memory map, allowing core Oberon modules to run unchanged.
  • Migration Details: Specific code modifications were necessary, including renaming INTEGER to LONGINT, providing Oberon-07 built-ins via SYS.Mod, careful handling of byte-sized data, transforming type case statements, and adjusting array assignments. The entire system is linked into a single boot image without dynamic loading.
  • Availability and Build: Precompiled versions are provided for Linux x64 and Windows x86, with platform-independent core files (po.bin, disk.img). Comprehensive build scripts are available for Linux, and the VM can be built using qmake or the BUSY build system, requiring only a C99 compiler and SDL2.

This endeavor successfully bridges a gap between a historically significant, minimalist operating system and modern open hardware, offering enthusiasts a practical and emulatable platform to explore Wirth's complete system design philosophy.